Your Profile
You are best equipped for this task if you have:
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Masters/Bachelors in Electrical Engineering or Computer Science with 8-12 years of relevant work experience.
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Strong understanding of Analog/Mixed Signal circuits.
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Understand the usage of tools like Virtuoso, Xcelium, Simvision and Waveview.
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Hands-on experience in writing Verilog-A/MS and Real Number Models and building SPICE test benches at Block and Fullchip Level.
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Hand-on experience in building the COSIM/ Mixed-signal verification environment.
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Implement mixed-signal test-benches in Cadence Virtuoso and/or Verilog-AMS/System Verilog to apply stimulus and checks.
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Hand-on experience with gate-level-simulations and with debugging/trouble shooting skills.
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Exposure to version-controlling (eg, Git/Bitbucket, Clearcase, CVS, SVN) and bug-management schemes.
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Experience in UVM-AMS is a plus.
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Self-motivated, flexible and with strong interpersonal skills.
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Good communication with interpersonal skills and is a good team player who is able to work well with both internal and external partners.
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Candidate must have proven ability to achieve results in a very dynamic, multi-site environment and be able to co-ordinate with priorities and self-initiatives.
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Experience in automotive industry in functional safety and cybersecurity are advantageous.
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A candidate who have more relevant working experience will be considered for a more senior position.